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Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA 2005, Las Vegas, Nevada, USA, June 27-30, 2005
ISBN: 1-932415-74-2, 2005
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'04, June 21-24, 2004, Las Vegas, Nevada, USA
ISBN: 1-932415-42-4, 2004
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23 - 26, 2003, Las Vegas, Nevada, USA
2003
Producer and Consumer: Roles of a Microprocessor and a Configurable Logic in a Configurable SoC
Engineering of Reconfigurable Systems and Algorithms, 325-, 2003
A Methodology to Implement Real-Time Applications on Reconfigurable Circuits
Engineering of Reconfigurable Systems and Algorithms, 188-200, 2003
A JBits-Based Incremental Design Environment with Non-Preemptive Refinement for Multi-Million Gate FPGAs
Engineering of Reconfigurable Systems and Algorithms, 118-126, 2003
PACT XPP Architecture in Adaptive System-on-Chip Integration
Engineering of Reconfigurable Systems and Algorithms, 21-30, 2003
Egret: A Flexible Platform for Real-Time Reconfigurable Systems on Chip
Engineering of Reconfigurable Systems and Algorithms, 300-303, 2003
Using Reconfigurable Computing to Accelerate Simulation Applications
Engineering of Reconfigurable Systems and Algorithms, 308-311, 2003
Instance-Specific Solutions to Accelerate the CKY Parsing
Engineering of Reconfigurable Systems and Algorithms, 72-80, 2003
A Fault Tolerant Multi-Agent System with Non-Deterministic Decision-Making for Task Allocation
Engineering of Reconfigurable Systems and Algorithms, 312-315, 2003
Fast Design Space Exploration Method for Reconfigurable Architectures
Engineering of Reconfigurable Systems and Algorithms, 65-71, 2003
Altera FPGA Technology Provides Innovative Solutions for Evolving Market Needs
Engineering of Reconfigurable Systems and Algorithms, 41-47, 2003
A Study of Mapping Generalized Sliding Window Operations on Reconfigurable Computers
Engineering of Reconfigurable Systems and Algorithms, 51-57, 2003
Searching RC5 Keyspaces with Distributed Reconfigurable Hardware
Engineering of Reconfigurable Systems and Algorithms, 269-272, 2003
FPGA Circuits for a Monte-Carlo Based Matrix Inversion Architecture
Engineering of Reconfigurable Systems and Algorithms, 201-207, 2003
The Impact of Routing Architecture on Reconfiguration Overheads
Engineering of Reconfigurable Systems and Algorithms, 102-110, 2003
Code Parameterization for Satisfaction of QoS Requirements in Embedded Software
Engineering of Reconfigurable Systems and Algorithms, 58-64, 2003
Increasing Efficiency by Partial Hardware Reconfiguration: Case Study of a Multi-Controller System
Engineering of Reconfigurable Systems and Algorithms, 147-153, 2003
An Analysis Tool Set for Reconfigurable Media Processing
Engineering of Reconfigurable Systems and Algorithms, 292-295, 2003
Hierarchical Run-Time Reconfiguration Managed by an Operating System for Reconfigurable Systems
Engineering of Reconfigurable Systems and Algorithms, 81-87, 2003
FPGAs: Re-Inventing the Signal Processor
Engineering of Reconfigurable Systems and Algorithms, 252-258, 2003
Lower Bound Estimation on the Numbers of LUT Blocks and Micro-Registers for Time-Mulitplexed FPGA Synthesis
Engineering of Reconfigurable Systems and Algorithms, 321-324, 2003
Towards Run-Time Re-Configurable Techniques for Real-Time Embedded Applications
Engineering of Reconfigurable Systems and Algorithms, 141-146, 2003
A Dynamic Module Server for Embedded Platform FPGAs
Engineering of Reconfigurable Systems and Algorithms, 31-40, 2003
Mapping Wireless Communication Algorithms to a Reconfigurable Architecture
Engineering of Reconfigurable Systems and Algorithms, 242-251, 2003
Latest Developments at Quicksilver Tech
Engineering of Reconfigurable Systems and Algorithms, 48-50, 2003
Using Flowpaths for the High-Level Synthesis of Reconfigurable Systems
Engineering of Reconfigurable Systems and Algorithms, 273-279, 2003
Architecture of a Reconfigurable Processor for Implementing Search Algorithm over Discrete Matrices
Engineering of Reconfigurable Systems and Algorithms, 127-133, 2003
Montium - Balancing between Energy-Efficiency, Flexibility and Performance
Engineering of Reconfigurable Systems and Algorithms, 235-241, 2003
Towards an RCC-Based Accelerator for Computational Fluid Dynamics Applications
Engineering of Reconfigurable Systems and Algorithms, 222-234, 2003
Dynamically Self-Reconfigurable Machine Learning Structure for FPGA Implementation
Engineering of Reconfigurable Systems and Algorithms, 296-299, 2003
Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations
Engineering of Reconfigurable Systems and Algorithms, 284-287, 2003
An Interface Methodology for Retargettable FPGA Peripherals
Engineering of Reconfigurable Systems and Algorithms, 167-173, 2003
A Preliminary Study of Molecular Dynamics on Reconfigurable Computers
Engineering of Reconfigurable Systems and Algorithms, 304-307, 2003
Precision Modeling of Floating-Point Applications for Variable Bitwidth Computing
Engineering of Reconfigurable Systems and Algorithms, 208-214, 2003